Measuring arrangements



2 SHEETS-SHEET l G. T. BAKER MEASURING ARRANGEMENTS June 24, 1952 original Filed Jan. 7, 1949 WM5/W02 620.965 /FyaMAsBA//e sr June 24, 1952 Q T, BAKER MEASURING ARRANGEMENTS 2 SHEETS--SHEET 2 Original Filled Jan. 7, 1949 Mm @u e www A Tw MM w. GWW/ Patented June 24, 1952 UNITED STATES PATENT OFFICE .signor to Automatic Telephone & Electric Company Limited, Liverpool, England, a British company @riginal application January 7, 19519, Serial No. 69,690. Divided and this application .June 19,

1950, Serial No. 168,995.

January 30, ,194.8

9 lClaims.

The present Vinvention relates to circuit arrangements employed for indicating the ,value f electrical Componentssuch as condensers and resistances.

It is known to measure .a Short .time .interval by employing .a resistance/,Condenser .combination arranged so that `the condenser discharges through the resistance. The time interval is given by where En is the voltage .across the condenser at the :beginning `.of ...the ,interval and E; is .the voltage facross the .condenser at ztheend of y.the interval. From this `eguatioriit=wi1l .be seen that .if

and either .C or .R is xed, the .equation becomes C=Kit or R=K2t thus the value of the condenser or resistance is dication is `given as to `whether the value of a component; lies .between 'two limiting `values.

Another object of the present linvention is Vto provide a circuit :arrangement `whereby in addition to giving an indication if the vvalue ofthe .component ffalls within the limiting values, an

indication is Aalso given, if I'the :value is Aoutside the limiting values, -as Ato whether Vthe value is above or below the limiting ivalues.

According to a .featureot the invention, in a. vcircuit arrangement -for vindicating whether :the value of ,a resistance lor acondenser is between two limiting vvalues :means are provided for charging and discharging thecondenser in a .resistance/condenser :combination which includes the component :to -be tested and ithe-time taken for the 4.voltage,across the .condenser itc change from one predetermined Vvalue @to .another predetermined/value is compared Vwith ftswo :time intervals corresponding to the twolimitingfvaluesiof thecomponent,r anzindicationbeing given whether lIn Great Britain the discharge time 'has a value between the two comparison time intervals.

:In one embodimentof :the invention for determining whether the value vof the component lies between -two limiting values, a .gate circuit is opened land closed at y.times vduring the discharge period of the condenser which correspond to the limiting values. nOnly if the component under test has .a value between the limiting values will kan impulse pass `through the gate to control an indicator vsuch as, for instance, a discharge tube.

In a further embodiment of the invention for the same purpose, the discharge time interval is vcompared with ytwo known time intervals by the use of three relaxationcircuits Two of the .circuits include lcomponents of yknown value while the third 'fincludesthe component under test. By suitably Yconnecting the outputs of `the relaxation circuits yto an indicator comprising aplurality of discharge tubes, `the tubes can-be arranged to n- ,dicate not only whether 4the `component value is Within the desired 'limits but also if it is not whether the Value is Vbelow or above said limits.

YIt cfrequently'happens that lrepetitive measurements -have to be made cna component. Normally each measurement 4is initiated by a key or like operation. Such repetitive key operation becomes tedious and it -is a lfurther object of the invention to provide Vcircuit arrangements which avoid this necessity.

`According to this =feature of the invention a pair of electromagnetic relays are `provided and yarranged for automatic sequential operation, one

of the relays serving xtoreset-the counting circuit while Ithe other initiates a measuring cycle.

The xinvention will be better understood from the following description of a number of embodiments taken in conjunction with the accompany- Ving drawingsand-comprisinggFigs 1 to 4. In the drawings,

Fig. '1 shows a-block schematic of an arrangement `lor indicating whether lthe Value of a condenser or aresistance approximates within predetermined limits 4to a nominal 'value while 'Fig. -2 shows the detailed circuit.

Fig. '3 shows van alternate arrangement to that of Fig. l and in laddition is .so arranged that if thecornponent value is outside the predetermined limits, an indication .isgiven whether the value is .above or zbelow such :limits while Fig. A shows .the .detailed circuit.

`Assume Ythata number. of condensers are manufactured having a nominal capacitance ofgCn. If tghllsliantglf QLOPQITlQQnlY Of .1K1 rfled t0 pulse source is used, a capacitance of exactly Cn will indicate 100 time units while the count on any other component will indicate directly its relationship to the nominal value. For production testing it is usually sufficient to indicate whether the deviation exceeds a specified value. For instance, a common tolerance is i. e. for a nomina-1 value of 10 time units the unknown capacitance must register more than 9 and less than 11.

Referring now to the drawings it should be explained that the references such as A2, G1 and C shown in Figs. 1 and 3 correspond to the anode of the valve V20, the grid of the valve V21 and the signal input to the gate valve V21. In the arrangement shown in Fig. l six scale-of-two circuits are interconnected to form a twelve point cyclic counter S12. This is driven continuously from a suitable pulse source and in the zero position, a

start pulse is applied to the test multivibrator l,

SSA comprising two back coupled valves V22 and V23, the coupling between the anode of V22 and the control grid of V23 being A. C. while that between the anode of V23 and the control grid of V22 is D. C. so that the stage has one stable and one unstable condition of equilibrium. The stable condition corresponds to the flow of current through the Valve V23. The start impulse causes the multivibrator SSA to be transposed and a negative-going pulse is applied to the inner control grid of the gate valve of the gate circuit G. This negative-going pulse is, however, without eiect since the gate va-lve is already cut-off on the inner grid. The 9th and 11th pulses from the counter S12 are applied to a so-called toggle circuit S1 which is simply a circuit having two stable states of equilibrium. The circuit S1 controls the opening and closing of the gate circuit and the arrangement is such that the gate is opened on the 9th and closed on the 11th pulse.

If now the test multivibrator SSA reverts to its normal condition while the gate circuit is opened, that is to say, between the 9th and 11th pulses, a negative-going pulse will be developed in the anode circuit of the gate valve V22x and this will be applied to a second multivibrator SSB which is again similar to the test multivibrator and which acts as a pulse-lengthener. The transposition of the pulse-lengthener due to the negative-going pulse causes the neon tube associated with the pulse-lengthening circuit to flash thereby indicating that the condenser has a value within the stated limits. It will be understood that if the test multivibrator SSA reverts to its normal condition before the 9th or after the 11th pulse, no pulse will be developed in the anode circuit of the gate valve and the neon tube will not flash.

Referring now to the detailed circuit shown in Fig. 2 the toggle circuit S1 consists of two crossconnected valves V2u and V21 each having an anode load R and R25 and feed-back circuits from the anode of V20 via R21, C21 and R23 to the grid of V21 and from the anode of V21 via R26, C22 and R24 to the grid of V20, the resistances R21 and R2@ being connected to the negative terminal of the supply voltage via resistances R22 and R22. The values of the various resistances in the toggle circuit are such that the circuit is negatively polarised. The cyclic counter S12 is not shown in detail since the circuit is well known and similarly the pulse source for driving the counter is not shown.

In the normal condi-tion of the test multivibrator, valve V23 will be conducting and V22 will be non-conducting. The zero negative-going pulse from the counter is applied to the grid of V23 which transposes the condition of the multivibrator so that V22 conducts and a negative-going pulse is developed across the anode load. This is without effect on the inner grid of the gate valve V24 since this grid is, yalready biased to cut ofi. In the `toggle circuit S1, the normal condition is with the valve V20 non-conducting and the valve V21 conducting. The potential at the point A2 is, therefore, low and hence the fourth grid of the gate valve V24 is biased negatively with respect to the cathode. The 9th pulse from the cyclic counter is applied via C22 yto the grid of V21 whereby the condition of the circuit is transposed and V21 now becomes non-conducting. The voltage at the point A2, ltherefore, rises and the potential of the fourth control grid of the gate valve V24 becomes positive with respect to the cathode and the gate is opened. The 111th impulse from the counter is applied via C21 to the control grid of V20 and causes the circuit S1 to revert to its normal condition andthe potential of the fourth grid now becomes negative with respect to the cathode and the gate is closed.

The time taken for the test multivibrator SSA to revert to its original condition will be determined by the value of the condenser C26 under test and if this reversion ta-kes place between the 9th and 11th pulse, indicating `that the value of the condenser is within the specified limits, then a positive-going pulse will be developed in the anode circuit of V22 and will be applied to the inner grid of the gate valve V24 at a time when the gate is open. A negative-going pulse will be developed in the `anode circuit of the gate valve and this will be fed via the condenser C25 to the control grid of the valve V22. The normal condition of the pulse lengthening circuit is for V22 to be conducting and V25 to be non-conducting so that there is not sufficient potential across the neon tube NT to cause it to flash. The pulse obtained from the anode of the valve V24 will be negative-going and will transpose the pulse lengthening circuit so :that V25 now conducts and the voltage `at the point A1 will fall to such an extent that the neon tube will ash. It will be understood that the neon tube will only remain lighted for the time taken for the pulse lengthening circuit to revert to its normal condition and this duration is suitably selected so that the lighting of the neon tube is easily visible.

It will be understood that the circuit will operate continuously so that if desired, a. number of tests may be made on each component. Once the high tension supply is connected to the circuit the only operation necessary to effect the test is to connect the condensers one by one to the terminals 2| and 22. Thus the whole equipment may be controlled by a single switch for connecting up the H. T. supply and a pair of terminals will be provided on the panel of the instrument to which the component under test is connected.

The circuit shown in Figs. 3 and 4 is a refinement of that shown in Figs. l and 2 in that if the value of the component is not within the specified limits, an indication is given as to whether it is below or above such limits. Referring first to Fig. 3, the equipment comprises three multivibrators SSN, SSo and-SS1= of which the multivibrator SSO includes the component under test. The other two multivibrators include fixed condensers and provide two time periods, a minimum TN and a maximum TP. The actual time To corresponding to the nominal value of the capacitor is limmaterial but is conveniently taken to be about 0.4 second, :corresponding to a laf. condenser associated with a 100 k. ohms resistance. Part of the resistance in the timing circuit of the .multivibrator SSN is made variable and a similar variable is employed in the timing circuit of the multivibrator SSP. Over the range covered, time is linear with resistance so that the scales yof the variables can be calibrated directly in percentage decrease or increase on To. The resistance as sociated with the multivibrator SSO can be set so that the nominal capacitance vof the unknown condenser corresponds to a release time of To. For a condenser within the speciiied limits, TN TO TP so that if the three multivibrators are set in operation simultaneously, they will revert in the order SSN, SSo, SSP. The order in which they actually revert is indicated Vby three indicating or toggle circuits SIA, SIB and SIc. In the normal condition of these circuits the neon tubes NTA, NTB and NTC are extinguished. If the multivibrator SSN reverts to its normal condition before the multivibrator SSO, a pulse is fed from SSN to SIA to cause the neon tube NTA to glow. Then when the multivibrator SSO reverts, the tube NTA is extinguished and a negative pulse is fed from SIA to SIB to cause the neon tube NTB to glow. Finally when the multivibrator SSP reverts, the neon tube NTB is extinguished and a negative pulse is fed to SIC to cause the neon tube NTC to glow. When the test has been completed, the neon tube NTC is extinguished and a second start signal is given by relay equipment similar to that shown in Fig. 2.

If however, the multivibrator SSO reverts before the multivibrator SSN, the pulse applied to. SIA by SSO will be without eiect while that subsequently applied by SSN will cause the neon tube NTA to glow but neither the neon tube NTB nor NTC will glow since no pulse is passed on from SIA to SIB or SIB to SIO. Further the reversion of SSP is without effect, so that the tube NTA continues to glow. Again if the multivibrators SSN and SSP the neon tube NTA will glow when SSN reverts and will be extinguished when SSO reverts and a pulse will be fed over SIA to SIB to cause the neon tube NTB to glow. This tube will, however, glow after the normal extinguishing pulse has been fed thereto by the multivibrator SSP and consequently no pulse will be fed to SIC. In this condition, therefore, the neon tube NTB remains lighted.

Thus if the condenser is within the specified limits, the neon tube NTC remains lighted while if the value is less than the lower limit the neon tube NTA remains lighted, and if it is greater than the maximum limit the neon tube NTB remains lighted.

Referring now to Fig. 4 which shows the circuits in detail, the multivibrators SSN, SSO and SSP are similar to the multivibrator SSA shown in Fig. 2 while the indicating vor toggle circuits SIA, SIB and Slo are similar to the toggle circuit SI shown in Fig. 2, and rare also arranged to respond only to negative-going impulses, the negative bias applied to the control grids being sufciently large to prevent triggering by any of the positive-going impulses applied thereto.

The condenser under test is `connected between terminals 3I and 32 in the multivibrator SSO and it will be understood that the normal condition of the multivibrators is with the valves V37, V33 and V41 conducting. As regards the toggle circuits the normal condition is with the valves V31, V33 and V35 conducting.

A start pulse is applied to the three multivibrators in parallel by the operation of relay IBR. This start pulse will be positive-going and is applied to the grids of the non-conducting valves V36, V33 and V40. The three multivibrators are transposed substantially simultaneously and consequently positive-going pulses will be developed at the points A2. These positive-going pulses will be applied to the toggle circuits SIA and SIB but as previously pointed out, they will be without effect as the toggle circuits are polarised to respond only to negative pulses. Assuming first that the condenser under test is within the speciiied limits, then the multivibrator SSN will be the first to revert to normal. When this takes place, the valve V37 becomes conducting and a negative-going pulse is fed from the anode of V37 via condenser C30 to the grid of valve V31 which it will be remembered is conducting. This pulse, therefore, causes the toggle circuit to be transposed so that the anode voltage of V31 increases and that of V30 decreases. The increase in anode voltage of V31 is without eiiect on the toggle circuit SIB while the decrease of anode voltage of V30 causes a potential difference to be developed across the neon tube NTA which thereupon glows.

The circuit remains in this condition until the multivibrator SSO reverts to normal when a negative-going pulse from the anode of V33 is applied via the condenser C31 to the grid of V30. This causes the toggle circuit SIA to revert to its original condition whereby the neon tube NTA is extinguished and a negative-going pulse is fed from the anode of V31 via condenser C32 to the grid of V33 of the toggle SIB. The toggle SIB. is thereby transposed and the neon tube NTB glows in a similar manner to that described for the toggle circuit SIA. The circuit remains in this condition until the multivibrator SSP reverts to normal when a negative-going pulse from the anode of V41 is fed via condenser C33 to the grid of V32 thereby causing the neon tube NTB to be extinguished and a negative-going pulse to be fed from the anode of V33 via condenser C3A t0 the grid of the valve V35 of the toggle circuit SIC. This toggle circuit is consequently transposed and the neon tube NTC is lighted. The circuit remains in this condition until relay IAR is again operated when resistance earth is connected in place of direct earth to the cathodes of the valves V30, V32 and V34 thus causing any operated toggle circuit to be restored to normal.

It will now be assumed that the Value of the condenser under test is below the lower of the specified limits. In this case the multivibrator SSO will revert to normal before the multivibrator SSN. When the multivibrator SSO reverts, a negative pulse will be applied via condenser C31 to the grid of V30 but vwill be without effect since this valve is non-'conducting at this time. The negative-going pulse subsequently obtained from the multivibrator SSN Ywill be applied via condenser C30 to the grid .of valve V31 and will cause the toggle circuit SIA to be transposed as previously described. The neon tube NTA is, therefore, lighted and remains lighted since the pulse which would normally cause its extinction has already been received and has been without 'eiect .Further when the multivibrator lSSP reverts 'to normal a .negative pulse will be applied via condenser C33 to the grid of V32 and this again will be without effect since the valve V32 is nonconducting at this time. The neon tube NTA, therefore, remains lighted until the resetting pulse is provided on the operation of relay IAR.

If the Valve of the condenser` under test is above the upper specied limit, the multivibrator SSN will rst revert and cause the lighting of the tube NTA as previously described. In this case the second multivibrator to revert will be SSP whereupon a negative-going impulse is applied via C33 to the grid of V32. This will be without effect since the valve V32 is non-conducting at this time. When the multivibrator SSO finally reverts, the neon tube NTA will be extinguished and a negative-going pulse will be fed from SIA via C32 to the grid of V33 and the circuit SIB will be transposed to cause the lighting of the neon tube NTB and this tube will remain lighted until the resetting pulse is obtained by the operation of relay IA.

With regard to the generation of the start pulse, this is provided by a circuit which enables repetitive measurements to be effected automattically and consists of an interrupter circuit comprising relays IGR and IAR. Relay IGR may, for instance, consist of a type of relay known as a galvanometer relay having a pair of cobalt steel magnets forming an astatic combination, one of the magnets being almost completely enclosed by a pair of deflection coils. The periodic time of oscillation of the magnets is controlled by a spiral hair spring and a robust silver contact IGRI is arranged to close at the end of the return swing, the hair spring being selected so that the galvanometer relay delivers one pulse every two seconds. The closure of contacts IGRI closes the circuit for relay IAR which at contacts IARI completes the circuit for the coils of the galvanometer relay in order to maintain the oscillation. Relay IAR in operating in addition at contact IAR-2 connects a resistance earth instead of direct earth to the cathode circuit of the normally non-conducting valves of the indicating circuits thus restoring any of these valves which may be conducting and setting the indicate circuits to normal. When relay IAR releases, relay IBR operates and as explained above, at contact IBRI provides the start pulse for the circuits SSN, SSO and SSD. This operation proceeds continuously a test taking place at each operation of relay IBR so that repetitive testing is possible. In operation the voltage supply is rst switched on and the key IKA is momentarily operated to cause the initial operation of relay IGR. After this operation relays IGR, AR and IBR interact continuously and a condenser such as C35 may be connected between terminals 3I and 32 on the front panel at any time and repetitive readings of the value of the condenser will continue to be given as long as the condenser is connected to the terminals.

I claim:

l. Circuit arrangements for testing resistors and capacitors and for indicating whether the value of the component under test is between two limiting values comprising a time-constant circuit including a combination of resistor and capacitor elements one of which elements is the component under test, means for generating a start signal, means for generating a iirst pulse a predeterminable time after said start signal to establish the lower of the two limiting values, means for generating a second pulse at a different predeterminable time after said start signal to establish the upper of the two limiting values, means including said resistor and capacitor combination for generating at a time subsequent to the development of said start signal a third pulse which is indicative of the value of the component under test, an indicating circuit, means for applying all of said iirst, second and third pulses to said indicating circuit and means for operating said indicating circuit to indicate whether said third pulse is applied to the indicating circuit after the application of said first pulse and before the application of said second pulse.

2. Circuit arrangements for testing resistors and capacitors and for indicating whether the value of the component under test is between upper and lower limiting tolerance values comprising a time-constant circuit including a combination of resistor and capacitor elements, one of which elements constitutes the component under test, means for generating a start signal, means for generating a first pulse a predeterminable time after said start signal to establish the lower oi the two limiting values, means for generating a second pulse at a different predeterminable time after said start signal to establish the upper of the two limiting values, means including said resistor and capacitor combination for generating at a time subsequent to the generation of said start signal a third pulse which is indicative of the value of the component under test, a normally closed gate circuit, means for opening said gate circuit in response to the generation of said iirst pulse, means for closing said gate circuit in response to said second pulse, means for applying said third pulse to said gate circuit and indicating means connected to said gate circuit and operated in response to the application of said third pulse to said gate circuit while said gate circuit is open.

3. Circuit arrangements for testing resistors and capacitors and for indicating whether the value of the component under test is between two limiting values comprising a time-constant circuit including a resistor and a capacitor in combination, one of which constitutes the component under test, a control circuit operating normally to charge said capacitor, a cyclic electronic counter, a source of accurately timed pulses for driving said counter, means in said control circuit for initiating the discharge of said capacitor in response to the rst impulse of a cycle delivered to said control circuit from said electronic counter, a normally closed gate circuit having an input circuit and an output circuit, means responsive to subsequent pulses delivered by said counter respectively for opening and closing said gate circuit, means in said control circuit for applying a pulse to the input to said gate circuit when the voltage across said capacitor reaches a predeterminable value, an indicator circuit connected to the output of said gate circuit and means responsive to the arrival of said pulse from said control circuit at the input to said gate circuit while said gate circuit is open for delivering a pulse to said output circuits for operating said indicator.

4. Circuit arrangements for testing resistors and capacitors and for indicating whether the value of the component under test is between two limiting values comprising a first relaxation circuit having one stable and one unstable condition of equilibrium, a time-constant circuit including resistance and capacitor elements of which one comprises the component to be measured and is included in the circuit determining the relaxation 9i period: of said first relaxation circuit. means for charging said capacitor with said first relaxation circuit in the stable condition, a cyclic electronic counter, a source of accurately timed impulses for driving said electronic counter, means responsive to the first impulse of a cycle delivered by said electronic counter for changing overr said first relaxation circuit thereby 'initiating the discharge of said condenser, a second relaxation circuit having two stable conditions of equilibrium, means responsivey to a subsequent impulse of a cycle from said electronic counter for changing over said second relaxation circuit from one stable condition to the second, a normally closed gate circuit having an input and an output, means responsive to the changeover of said second relaxation circuit for opening said gate circuit, means responsive to the last impulse of a cycle delivered by said electronic counter for changing over said second relaxation circuit from the second stable condition to the rst, means responsive to the last changeover of said second relaxation circuit for closing said gate circuit, means for applying a pulse to the input of said gate circuit when said first relaxation circuit reverts to the stable condition in response to a predeterminable change in the voltage across said capacitor, an indicator circuit connected to the output of said gate circuit and means responsive to the arrival of said pulse from said rst relaxation circuit at said gate circuit at a time when said gate circuit is open for delivering a pulse through said output circuit to operate said indicator circuit.

5. Circuit arrangements as claimed in claim 4 wherein said indicator circuit comprises a relaxation circuit having a stable and an unstable condition of equilibrium and a discharge tube connected to the anode circuit of the tube which is non-conducting in the stable condition of the relaxation circuit.

6. Circuit arrangements for testing resistors and capacitors and for indicating whether the value of the component under test is between two limiting values comprising, a first relaxation circuit having a stable and an unstable condition of equilibrium, a time-constant circuit including resistor and capacitor elements of which one element is the component under test, said timeconstant circuit forming a part of the circuit determining the relaxation period of said first relaxation circuit, means for charging the capacitor of the time-constant circuit during the stable condition of the said relaxation circuit, a second relaxation circuit having first and second stable conditions of equilibrium, a cyclic electronic counter, a source of accurately timed pulses for driving said counter, means for transmitting the first pulse in a cycle from said electronic counter to said rst relaxation circuit to change over said relaxation circuit to said unstable condition and thereby to initiate the discharge of said capacitor, means for transmitting subsequent pulses in the same cycle from said electronic counter to said second relaxation circuit to change over said second relaxation circuit from said rst stable condition to said second stable condition and back to said rst stable condition respectively, a normally closed gate circuit controlled by said second relaxation circuit and having an input circuit and an output circuit, a voltage source, means effective upon changeover of said second relaxation circuit from said rst to said second stable condition for applying to said gate circuit a gate opening voltage derived from said voltage source and CII responsive to the changeover of said second relaxation circuit from said second to said rst stable condition for applying a gate closing voltage derived from said voltage source to said gate circuit, means responsive to the changeover of said first relaxation circuit from the unstable to the stable condition for applying a pulse to the input circuit of said gate circuit, an indicator connected to the output of said gate circuit and means responsive to the arrival of said pulse from said rst relaxation circuit at said gate circuit at a time when said gate circuit is open for delivering a pulse through said output circuit to operate said indicator.

'7. Circuit arrangements for testing resistors and capacitors and for indicating whether the value of the component under test is between two limiting values, one above and one below an optimum value, and if not whether it is above or below said optimum value comprising a timeconstant circuit including resistor and capacitor elements of which vone constitutes the component to be tested, a rst, a second and a third control circuit, means for simultaneously operating all said control circuits, means for causing said rst control circuit tol revert to the unoperated condition after a time period measuring the lower of said limiting values, means for causing said second control circuit to revert to the unoperated condition after ,a period measuring the upper of said limiting values, means including said time-constantcircuit for causing said third control circuit to revert to the unoperated condition after a time period which is substantially a measure of the optimum value of the component to be tested, a rst, a second and a third indicator means, means for operating said rst indicator means at time periods when the third control circuit reverts to the unoperated condition prior to said first and second control circuits, means for operating said second indicator means at time periods when the third control circuit reverts to the unoperated condition subsequent to the rst control circuit and prior to the second control circuit and means for operating the third indicator means at time periods when the third control circuit reverts to the unoperated condition subsequent to each of the second and third control circuits.

.8. Circuit arrangements for testing resistors and capacitors and for indicating whether the value of the component under test is between two limiting values and if not whether it is above or below said limiting values comprising a timeconstant circuit including a resistor and capacitor combination, of which one is the component to be tested, first, second and third control relaxation circuits each having one stable and one unstable condition of equilibrium, means for simultaneously changing over said rst, second and third relaxation circuits from said stable to said unstable condition, a relaxation period determining circuit for said first relaxation control circuit for causing said circuit to revert to said stable condition in a time representative of the lower of said two limiting values, a relaxation period determining circuit for said second relaxation control circuit for causing said circuit to revert to said stable condition in a time representative of the upper of said two limiting values, a relaxation period determining circuit for said third relaxation control circuit including the resistor and capacitor combination time-constant circuit for causing said circuit to revert to said stable condition in a time representative of 11 the value of the component under test, first, second and third relaxation indicator circuits each having a normal first condition of stable equilibrium and a second condition of stable equilibrium, a rst connection between said first relaxation control circuit and said first relaxation indicator circuit for transmitting a pulse on the reversion of said rst relaxation control circuit to the stable condition to change over said rst relaxation indicator circuit from the normal stable condition to the second stable condition, a second connection between said third relaxation control circuit and said rst relaxation indicator circuit for transmitting a pulse on the reversion of said third relaxation control circuit to the stable condition to change over said rst relaxation indicator circuit from the second stable condition to the normal stable condition, a third connection between the second relaxation control circuit and said second relaxation indilcator circuit for transmitting a pulse on the recondition and a fifth connection between said second relaxation indicator circuit and said third relaxation indicator circuit for transmitting a pulse to change over said third relaxation indicator circuit from the normal to the second condition on the changeover of said second relaxation indicator circuit from the second condition to the normal condition.

9. Circuit arrangements as claimed in claim 8 comprising a cyclically-operated relay set including at least two interacting relays, contacts controlled by said relay set, means responsive to the operation of one contact at the beginning of a cycle for simultaneously operating said control circuits and means responsive to the operation of another contact at the end of a, cycle for triggering said relaxation circuits from the second stable position back to the first.

GEORGE THOMAS BAKER.

REFERENCES CITED The following references are of record in the ille of this patent:

UNITED STATES PATENTS Number Name Date 2,044,424 Edwards et al. June 16, 1936 2,408,727 Blitz Oct. 8, 1946 2,445,584 Ramo July 20, 1948 2,504,848 Kunz Apr. 18, 1950 2,544,685 Jackson Mar. 13, 1951 

